<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Ady Arie | CISELab</title><link>https://www.ciselab.nl/author/ady-arie/</link><atom:link href="https://www.ciselab.nl/author/ady-arie/index.xml" rel="self" type="application/rss+xml"/><description>Ady Arie</description><generator>Hugo Blox Builder (https://hugoblox.com)</generator><language>en-us</language><lastBuildDate>Sat, 01 Jan 2022 09:57:31 +0100</lastBuildDate><image><url>https://www.ciselab.nl/media/icon_hu74ac7865332a7eb8d764f3857b584e33_11571_512x512_fill_lanczos_center_3.png</url><title>Ady Arie</title><link>https://www.ciselab.nl/author/ady-arie/</link></image><item><title>Large scale inverse design of planar on-chip mode sorter</title><link>https://www.ciselab.nl/publication/acsphotonics2022/</link><pubDate>Sat, 01 Jan 2022 09:57:31 +0100</pubDate><guid>https://www.ciselab.nl/publication/acsphotonics2022/</guid><description/></item></channel></rss>